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Analog Layout Engineer / Lead

As the Analog Layout Engineer / Lead, you will bring hands-on analog and mixed-signal layout experience to advance the integration of AI in semiconductor design. You will define scalable methodologies that enable accurate, efficient, and constraint-aware design at both advanced and mature nodes.

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​This role requires in-person work at our San Francisco or Taipei office.

Leafy Lab

Leafy Lab is redefining semiconductor design with explainable AI. Our technology aims to deliver 95%+ prediction accuracy and reduce chip development time by up to 50%. By combining AI, device physics, and semiconductor engineering, we build next-generation modeling and circuit design tools that address the industry’s hardest technical challenges. Our platform is trusted by the world’s top 10 chip design companies and backed by leading Silicon Valley investors. Every engineer directly shapes our product and the future of AI-driven chip design.

Key Responsibilities

  • Lead the development of Leafy Lab’s analog and mixed-signal layout methodology 

  • Embed device matching, parasitic control, symmetry, and constraint-based design into AI models 

  • Collaborate with software and AI teams to translate layout principles into algorithms and verification flows 

  • Evaluate AI-generated layouts and provide recommendations to improve accuracy and feasibility 

  • Optimize PDK, LVS, DRC, and design rule compliance 

  • Establish AI layout verification and benchmarking methodologies 

  • Incorporate industry best practices to enhance product competitiveness

Qualifications

  • Bachelor’s, Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field

  • 3–5 years of experience in analog or mixed-signal layout

  • Deep understanding of layout tools such as Cadence Virtuoso 

  • Familiar with EDA, PDK, and constraint-driven design

  • Deep understanding of physical layout challenges and manufacturability trade-offs

  • Strong sense of ownership, curiosity, and ambition to shape the future of AI × Layout

Why Join Leafy Lab

  • Real Industry Impact: Build tools used by global engineering teams to accelerate next-generation AI and chip development

  • Deep Technical Challenges: Tackle complex ML × device physics × EDA problems, including high-precision modeling and explainable AI

  • Full-Stack Technical Growth: Develop across chip design, device modeling, AI algorithms, and system-level tooling

  • High Ownership and Influence: Early engineers shape our architecture, product direction, and long-term technical vision

How to Apply

  • Send your resume, GitHub/portfolio (if available), and a brief note about a layout problem you've solved to business@leafylab.io with the subject line “Analog Layout Lead – [NAME]”

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